In the cyclic model shown here, the program reads a stored input state. At the cycle's input update, the CPU takes a snapshot of the configured inputs into the process image. The program then uses those stored values. This explains how an input can change at the terminal while the current program execution still sees the value captured earlier.
The example shows a push-button signal, the CPU's process image and the lamp controlled by the program (%Q0.0 := %I0.0). Press ⏸ Pause scan, then operate the button. The stored image and lamp don't move while the simulated scan is paused. Select ⏭ Step to capture the next input state and run the logic from that updated image.
A 5-millisecond pulse can be missed entirely if the input becomes TRUE and then FALSE again between successive samples. In this simplified cycle, every rung uses the same stored input value until the next update. That makes the program's view consistent even if the physical signal changes during execution; it also means the program cannot infer a pulse that was never sampled.
Absolute addresses identify a memory area and a location within it. The examples here use the main input, output and bit-memory areas. Select each to inspect its role. The address format is % and the area letter. A bit address then gives byte.bit, as in %I0.3. A byte, word or dword address adds a size letter (B, W, D) and the start byte, as in %MW10.
An absolute reference such as %I0.0, %M10.2 requires you to know which signal the address represents. Give the signal a descriptive name in the PLC tag table and use it in the logic. The tag table still maps that PLC tag to its address, so the name describes the signal while the mapping records its location.
%Q0.2 := %I0.0 AND NOT %I0.1; // what are 0.0 and 0.1 again? // move a wire → hunt every address
"Conveyor" := "StartPB" AND NOT "StopPB"; // reads like a sentence // re-map a tag once, code is untouched
The PLC tag table maps a symbolic PLC tag such as "StartPB" to an address like %I0.0. If its wiring assignment changes, update the mapping and check the affected I/O and logic. References using that symbol then use the new mapping; the name alone does not confirm that the rewired machine behaves correctly.
A sensor pulses TRUE for about 2 ms. Your scan time is 6 ms. Sometimes the program does not detect the pulse at all. How can the sampling interval explain that result?